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2006.09.26

今日の日記

日記

Verilog Parserみーつけた!
http://vlsicad.eecs.umich.edu/BK/Slots/cache/www.veripool.com/verilog-perl.html

新FPGA
http://www.pldesignline.com/showArticle.jhtml?articleID=193002445

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