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2004.05.14

free hardware その後

ML読みながら、こんなの見つけた。
XilinxのVirtex関連のツール。面白そうだ。
http://neil.franklin.ch/Projects/VirtexTools/index.html.en

そして、ストールマンから

There is however nice benefit. If you are doing standard ASICs,
you send the masks directly to the FAB (not netlist -- circuit
description). Since designs tend to be dense, it is thus very hard
to make a sequence detector circuit without making the huge
diferencies to the layout. You have reference mask, which you
sent, therefore all you have to do is compare the masks and the
real die implementation. Moreover it would probably suffice to
calculate some sort of "CRC" to make a check.

「工場にマスクを送りつけろ!」ってのは、流石に無理だと思われ。

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